Computing Community Consortium Blog

The goal of the Computing Community Consortium (CCC) is to catalyze the computing research community to debate longer range, more audacious research challenges; to build consensus around research visions; to evolve the most promising visions toward clearly defined initiatives; and to work with the funding organizations to move challenges and visions toward funding initiatives. The purpose of this blog is to provide a more immediate, online mechanism for dissemination of visioning concepts and community discussion/debate about them.


What Now in Instruction-Level Parallelism Research?

July 8th, 2010 / in Uncategorized / by Ran Libeskind-Hadas

A workshop entitled “What Now in Instruction-Level Parallelism Research?” will be held on September 20-21, 2010 in Seattle, WA.  While we encourage you to submit a position paper to this workshop, you are also encouraged to post your thoughts right here on this blog!

Historically, the computing industry has been driven by a set of exponential increases in single-thread performance. The ubiquity of multi-cores and the fact that much of the IT industry is relying on main-streaming parallel processing for survival is a truly seismic event. At the same time, there remains a huge gap between the theoretical limits of instruction-level parallelism (ILP) and what processors actually attain. Novel techniques to push ILP further in the familiar sequential execution model may yet to be invented. In this environment, one wonders if this is as good as it gets for ILP. Is ILP research over? Should it be? What are the truly new ideas and insights that can propel another three decades of exponential performance growth? How should ILP research be funded, performed and evaluated?

The wheels have come off the exponential track! – This Call for Position Papers is for the second of the two workshops and focuses on “Instruction Level Parallelism”; the first workshop focused on “Failure is Not an Option: Popular Parallel Programming”. For this second workshop, members of the computer architecture community are invited to submit a 1-page position paper outlining their thoughts on ILP research.

Some questions a submitter may wish to address are:

  • Is there anything left to do with ILP research?
  • Should funding agencies and industry support it?
  • Should computer architecture conferences embrace it?
  • What are the top 5 constraints on ILP in current microprocessors?
  • What are the key new ideas and fruitful areas to explore in ILP?
  • What is the role of re-configurability and heterogeneity in ILP?
  • How to effectively support continuous run-time optimization in single-threaded systems?

Potential contributors are encouraged to be brief, and keep the following in mind:

  • The position paper should not be about what you are working on currently; it should be about a vision for computer architectures available 10-15 years from now.
  • There is no need to address all of the above questions. Addressing one or a few, or even others the submitter deems relevant is fine.
  • Should computer architecture conferences embrace it?
  • Keep the topic of ILP central.
  • The steering committee will select the workshop invitees based on the responses. The committee is looking for a wide range of insightful, contrarian and forward thinking views.

Submit a 1-page PDF file to acar@cs.uiuc.edu by 6pm PST, August 6th, 2010.

What Now in Instruction-Level Parallelism Research?