Abstract: This paper introduces a way of implementing parallel programs which can be formally verified. It uses ideas from OO-programming, Pi-Calculus, CSP, and Actor systems, together with a new way of organizing communications among parallel processes. The interesting feature is, it allows programs to be developed from an initial abstract statement of interactions among parallel computing units, called cells, and progressively refine them to their final implementation. At each stage of refinement a formal description of patterns of events that computations generate is derived automatically from implementation specifications. This formal description is used for two purposes: The first is to prove properties of the implementation, such as correctness, progress, mutual exclusion, and freedom from deadlocks/livelocks, etc, stated in a CTL-language. The second is to automatically incorporate into each application implementation, a Self-Monitoring System (SMS) that constantly monitors the application in parallel while it is running, throughout its life time, with little or no interference with its timings, in order to identify errors in performance, pending errors, and patterns of critical behavior, and generate timely reports.
The message passing paradigm is called TICC™ and the Parallel Program Development and Execution platform is called TICC™-Ppde. A prototype of TICC™ and TICC™-Ppde without the formal proof methods but with the infrastructure for SMS has been implemented and tested for parallel program development and execution.
TICC™-Ppde requires and can efficiently use large numbers of CPUs. The programming abstractions and tools it provides are ideally well suited to develop parallel software that may run in a diversity of multicore chips with integrated TICCNET™, fully exploiting their performance capabilities.
This paper introduces through a series of examples, principles of program organization, automatic derivation of models from implementations and model based proof generation, and defines mechanisms that implement dynamic model based SMS. Part II defines the denotational semantics and proof theory.

Those interested please contact the author at the above email address:

Srinivasan

http://www.a-vajda.eu/blog

Because of the von Neumann syndrome many von-Neumann-only cores cannot be the solution because of extreme inefficiency. Hetero is the way to go. Massive software to configware migration is the only possible way to maintain growth of performance – replacing the ending free ride on Moore’s law.

The multicore research community is just spinning its wheels. The solution to the parallel programming crisis has been around for decades. The academic research community is blind to it because of its enfatuation with Turing machines and multithreading. There is a way to design and program parallel computers that does not involve the use of threads at all. It is a method that programmers have been using to simulate parallelism in such applications as neural networks, cellular automata, simulations, video games and even VHDL. It is not rocket science.

His series can be found here:
http://software.intel.com/en-us/articles/developing-for-terascale-on-a-chip-first-article-in-the-series

HWright
http://www.pervasivedatarush.com